The world is experiencing economic growth, which is resulting in the rising disposable income in several countries. This is allowing people to spend on things that earlier were unaffordable or a luxury, such as smartphones, tablets, and laptops. This is resulting in the expansion of the consumer electronics industry, primarily in Asian countries, including India, South Korea, China, and Japan.
Due to the rising adoption of the technology in electronic devices, the silicon on insulator market is predicted to grow from $684.8 million in 2018 to $2,285.5 million by 2024, at a 22.7% CAGR during 2019–2024 (forecast period).
SOI is essentially a fabrication technique, wherein a layer of insulator is sandwiched between two layers of silicon. SOIs are available in less-than 200 mm, 200 mm, and 300 mm wafer sizes, among which the 200 mm chips are most favored, due to the consistent demand for radio frequency (RF) SOI substrates.
RF-SOI comprises a high-resistivity substrate of silicon, where a trap-rich layer is placed between an extremely thin insulator layer, known as buried oxide, and a silicon wafer. Reduced insertion loss and increased linearity in the system are some advantages of RF-SOI, which push its adoption in electronic devices. Such components find wide application in Wi-Fi and cellular communication, along with making RF chips for switch devices and antenna tuners, which are used in 3G, 4G/LTE, and 5G smartphones.
With the introduction of 5G services across the world, the sales of smartphones are predicted to increase further during the forecast period. The popularity of smartphones is also influenced by the rising disposable income, primarily in developing countries, such as India and China. For instance, an increase of 7.5% was witnessed in the disposable income in China between 2017 and 2018. With the rising demand for smartphones, the sale of chips and microchips for their manufacturing has also risen.
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The growing requirement for RF-SOIs would, in turn, lead to an increase in a higher usage of the bonding fabrication method, compared to the layer transfer and smart cut methods, for semiconductor production. The bonding technology has numerous advantages, including better radiation hardness, latch up-free operation, excellent isolation, reduced short channel effects, and higher switching speeds.
Additionally, bonding allows for the joining of heterogeneous semiconductor materials, without damage to the structure of the crystal, as no macroscopic gluing layer or external force is required for joining the two mirror-polished wafers.
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